Interpretation of Harmonic Standard: IEEE-519-1992

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Introduction:
IEEE-519-1992 is one of the widely accepted standards for harmonics. It discusses at length mainly the causes of generation of harmonics, their effects on various components of electrical plant, methods of harmonic analysis, techniques for harmonic control and the acceptable limits for voltage and current harmonics. Though the standard is self-explanatory, this paper throws light on interpretation of tables indicating the voltage and current harmonics from better clarification point of view.

Voltage Distortion Limits:

Table 11.1 of IEEE-519-1992 standard talks about allowable voltage distortion limits:
Bus Voltage at PCC Individual Voltage Distortion(%) Total Voltage Distortion THD (%)
69 kV and below 3.0 5.0
69.001kV through 161 kV 1.5 2.5
161.001kV and above 1.0 1.5

Note: The high voltage systems can have up to 2% THD where the cause is an HVDC terminal that will attenuate by the time it is tapped for a user.

Interpretation:

  1. The individual voltage distortion means the voltage distortion of any harmonic, 2nd,3rd,5th etc. This means that no single harmonic can have contribution more than the figure specified in the table.
  2. The total harmonic distortion includes the Root-Sum-Square of all the harmonics. This cannot exceed the values given in the table.
  3. As unloaded HVDC system will distort the utility more, hence the limit is relaxed from1.5% to 2% for high voltage systems, however it is expected to fall within the limit of 1.5% after it is tapped for a user.
  4. Outside the industrial plant PCC is the Point of Common Coupling which is a point of metering, which can be accessible by the utility as well as consumer, where harmonic measurement is meaningful to both. Within the industrial plant it is the point between the linear load and the non-linear load.
  5. As the incoming voltage increases the allowable voltage distortion limits reduce, this is because higher the voltage larger is the power consumption and more responsible is the utility to maintain the harmonics within limits.

Current Distortion Limits:
Current Distortion Limits are given as per the incoming voltage, the following table shows the limits, for the incoming voltage between 120 V to 69 kV.

Maximum Harmonic Current Distortion in Percent of IL
Individual Harmonic Order ( Odd Harmonics )
Isc / IL
<20*
20 to <50
50 to <100
100 to < 1000
>1000
<11
4.0
7.0
10.0
12.0
15.0
11<h<17
2.0
3.5
4.5
5.5
7.0
17<h<23
1.5
2.5
4.0
5.0
6.0
23<h<35
0.6
1.0
1.5
2.0
2.5
35<h
0.3
0.5
0.7
1.0
1.4
TDD
5.0
8.0
12.0
15.0
20.0

Even harmonics are limited to 25% of the odd harmonics limits above. Current distortions that result in a DC offset, e.g., Half wave converters are not allowed.
*All power generation equipment is limited to these values of current distortion, regardless of actual Isc / IL

Where
Isc = Maximum short circuit current at PCC.
IL = Maximum demand load current (fundamental frequency component) at PCC.
TDD = The total root sum square harmonic current distortion, in the percent of the maximum demand load current.

Interpretation:

  1. As the ratio Isc / IL increases the current distortion limits are relaxed, the reason is that the more the short circuit capacity as compared to the maximum demand current the more is the sturdiness of the incoming power line and the lesser is the voltage distortion for the given current distortion, thus lesser is the power pollution for the given current distortion.
  2. As the order of the harmonic increases for the given ratio of Isc / IL, the allowable current distortion reduces. This is because, as the order of the harmonic increases the harmonic becomes more and more harmful. This is due to:
    • Skin effect increases with the frequency.
    • Proximity effect increases with the frequency.
    • Hysteresis losses increase with the square of the frequency.

    Hence as the order of the harmonic increases the allowed level of given order of harmonic is reduced.

  3. Even harmonics are not allowed beyond 25% of odd harmonics The reason is that even harmonics are due to single phase circuits or due to unbalances in the three phase converters, both of these should be restricted.
  4. The harmonic standard gives separate current distortion limits for incoming voltage between 69 kV and 169 kV and beyond 169 kV. For the same ratio of Isc / IL and for the given harmonic order the allowed current distortion reduces with increase in the incoming voltage. This is because as the voltage level increases higher power levels are involved and the responsibility of keeping the harmonic distortion low increases hence the current distortion allowed reduces with increase in incoming voltage.
  5. In the table given above the importance is given to the maximum load current (IL), and not to the actual load current, when the limits for TDD (total demand current distortion) are decided; because the actual current may reduce during some parts of the day (during lunch break etc), and when the machines are loaded to the lesser extent the current distortion increases and it may give wrong warning signal. Whereas even if the distortion increases during less loading the actual harmonic current is less due to less current drawn by the non-linear loads.

Thus the harmonic standard IEEE-519-1992 puts the appropriate limits on voltage and current distortions.

[ Contributed Mr. S.B. Mahajani, Dy General Manager, Amtech Electronics (India) Ltd, Gandhinagar]

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